Many imaging devices, such as solid state imaging devices including, but not limited to, complementary metal-oxide semiconductor (“CMOS”) devices and charge coupled devices (“CCD”), require the implementation of an analog-to-digital converter (“ADC”). The imaging device typically has one or more pixels, such as a two-dimensional array of pixels, where each pixel generates an analog output signal (the “pixel output signal”), the level of which is not known. The pixel output signal is converted, as necessary, into digital data. In a typical imaging device having a pixel array, where the pixel array is a matrix organized in columns and rows, each column has associated therewith a column ADC to convert the pixel output signal then active in that given column to digital data.
As is known in the art, in certain imaging devices the pixel output signal, which may be a voltage signal, is compared with a ramped reference signal, which also may be a voltage signal. During this comparison, a counter operates to keep track of the number of pulses of a clock signal required for the ramped reference signal to become greater than (or less than, depending on the particular implementation) the pixel output signal. From the operation of the counter, a digital data signal can be derived.
Existing implementations of ramp generating circuits used for ADCs are either very complex or create inaccuracies when used with ADCs in real-world applications.